Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI

被引：0

作者：

Saitoh, Masumi ^{[1
]}

Fujii, Shosuke ^{[1
]}

Oda, Minoru ^{[1
]}

Yamaguchi, Marina ^{[1
]}

Kabuyanagi, Shoichi ^{[1
]}

Yoshimura, Yoko ^{[1
]}

Ota, Kensuke ^{[1
]}

Sakuma, Kiwamu ^{[1
]}

Kamimuta, Yuuichi ^{[1
]}

机构：

[1] Toshiba Memory Corp, Future Memory Dev Dept, Device Technol R&D Ctr, 800 Yamano Isshiki Cho, Yokaichi 5128550, Japan

来源：

2018 48TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC) | 2018年

关键词：

ferroelectric tunnel junction; FTJ; memory; poly-silicon; nanowire; thin-film transistor; PERFORMANCE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present excellent performance of the two key devices in future 3D-LSI, HfO2 ferroelectric tunnel junction (FTJ) memory and poly-Si nanowire transistors. HfO2 FTJ has advantages such as CMOS compatibility, low operation current, self-compliance, and intrinsic diode properties. By scaling both ferroelectric layer and interfacial layer thickness, reduction of operation voltage while maintaining sufficient ON/OFF ratio was successfully demonstrated. High-mobility poly-Si nanowire transistors were realized by adopting advanced SPC (solid-phase crystallization) process. It was revealed that Coulomb scattering due to defects inside grains as well as defects at grain boundaries and enhanced surface roughness scattering are the major origins of mobility degradation in poly-Si transistors.

引用

页码：138 / 141

页数：4

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