Thermal scaling of ultra-thin SOI: Reduced resistance at low temperature RTA

被引：0

作者：

Yang, JH ^{[1
]}

Oh, J ^{[1
]}

Im, K ^{[1
]}

Baek, IB ^{[1
]}

Ahn, CG ^{[1
]}

Park, J ^{[1
]}

Cho, WJ ^{[1
]}

Lee, S ^{[1
]}

机构：

[1] Elect & Telecommun Res Inst, Furture Technol Res Div, Taejon 305350, South Korea

来源：

ESSDERC 2004: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2004年

关键词：

D O I：

10.1109/ESSDER.2004.1356512

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper explores the effect of silicon-on-Insulator (SOI) thickness scaling on its electrical property. It is observed, for the first time, that the sheet resistance of ultra-thin SOI is lower than that of thick SOI under the same condition of plasma doping and thermal annealing at low RTA temperature. This shows that dopant profile distribution and activation efficiency are different with different SOI thickness and different RTA temperature. In this work, we investigated the sheet resistance of SOI and made a comparative study of change in drain saturation current of long channel FD SOI-MOSFET fabricated with various SOI thickness and RTA temperature for the understanding thermal scaling of ultra-thin SOI.

引用

页码：153 / 156

页数：4

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