An accelerator for double precision floating point operations

被引：2

作者：

Danese, G ^{[1
]}

De Lotto, I ^{[1
]}

Leporati, F ^{[1
]}

Scaricabarozzi, M ^{[1
]}

Spelgatti, A ^{[1
]}

机构：

[1] Univ Pavia, Dipartimento Informat & Sistemist, INFM, I-27100 Pavia, Italy

来源：

ELEVENTH EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, PROCEEDINGS | 2003年

关键词：

D O I：

10.1109/EMPDP.2003.1183566

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

We describe DPFPA (Double Precision Floating Point Accelerator) an FPGA based coprocessor interfaced to the CPU through the PCI bus; it is conceived to accelerate the evaluation of double precision floating point operations. This coprocessor is based on two double precision floating point units: a pipelined adder and a pipelined multiplier. The work is part of a global project aimed to design and build a parallel system made up by a cluster of accelerated workstations. First estimations of performance have been obtained, using a similar board developed at Fermilab (Batavia, IL) with less recent components and working at half the frequency with respect to DPFPA. Even in this case, a substantial acceleration with respect to the execution on Intel's CPU based mother-board was observed.

引用

页码：57 / 63

页数：7

共 50 条

[31] Conversion of Mersenne Twister to double-precision floating-point numbers
Harase, Shin
MATHEMATICS AND COMPUTERS IN SIMULATION, 2019, 161 : 76 - 83
[32] Vendor Agnostic, High Performance, Double Precision Floating Point Division for FPGAs
Fang, Xin
Leeser, Miriam
2013 IEEE CONFERENCE ON HIGH PERFORMANCE EXTREME COMPUTING (HPEC), 2013,
[33] Optimizing floating point operations in Scheme
Wong, WF
COMPUTER LANGUAGES, 1999, 25 (02): : 89 - 112
[34] Embedded Complex Floating Point Hardware Accelerator
Ghasemazar, Amin
Goli, Mehran
Afzali-Kusha, Ali
2014 27TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2014 13TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID 2014), 2014, : 318 - 323
[35] Accelerating microblaze floating point operations
Kadlec, Jiri
Bartosinski, Roman
Danek, Martin
2007 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLS 1 AND 2, 2007, : 621 - 624
[36] Analysis of Floating Point Operations in Microcontrollers
Ramakrishnan, Aswin
Conrad, James M.
IEEE SOUTHEASTCON 2011: BUILDING GLOBAL ENGINEERS, 2011, : 97 - 100
[37] Nonlinear Model Predictive Control Hardware Implementation with Custom-precision Floating Point Operations
Ayala, Helon
Sampaio, Renato
Munoz, Daniel M.
Llanos, Carlos
Coelho, Leandro
Jacobi, Ricardo
2016 24TH MEDITERRANEAN CONFERENCE ON CONTROL AND AUTOMATION (MED), 2016, : 135 - 140
[38] A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing
Li, Kai
Mao, Wei
Zhou, Junzhuo
Li, Boyu
Yang, Zhengke
Yang, Shuxing
Du, Laimin
Huang, Sixiao
Yu, Hao
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (10) : 4123 - 4127
[39] High Performance High-Precision Floating-Point Operations on FPGAs using OpenCL
Nakasato, Naohito
Daisaka, Hiroshi
Ishikawa, Tadashi
2018 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT 2018), 2018, : 265 - 268
[40] A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing
Li, Kai
Zhou, Junzhuo
Li, Boyu
Yang, Shuxing
Huang, Sixiao
Luo, Shaobo
Mao, Wei
Yu, Hao
2022 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2022): INTELLIGENT TECHNOLOGY IN THE POST-PANDEMIC ERA, 2022, : 226 - 229

← 1 2 3 4 5 →