Normally-Off Sputtered-MoS2 nMISFETs with MoSi2 Contact by Sulfur Powder Annealing and ALD Al2O3 Gate Dielectric for Chip Level Integration

被引：0

作者：

Matsuura, K. ^{[1
]}

Hamada, M. ^{[1
]}

Hamada, T. ^{[1
]}

Tanigawa, H. ^{[1
]}

Sakamoto, T. ^{[1
]}

Cao, W. ^{[2
]}

Parto, K. ^{[2
]}

Hori, A. ^{[1
]}

Muneta, I. ^{[1
]}

Kawanago, T. ^{[1
]}

Kakushima, K. ^{[1
]}

Tsutsui, K. ^{[1
]}

Ogura, A. ^{[3
]}

Banerjee, K. ^{[1
,2
]}

Wakabayashi, H. ^{[1
]}

机构：

[1] Tokyo Inst Technol, Dept Elect & Elect Engn, Yokohama, Kanagawa, Japan

[2] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA

[3] Meiji Univ, Grad Sch Sci & Technol, Kawasaki, Kanagawa, Japan

来源：

2019 NINETEENTH INTERNATIONAL WORKSHOP ON JUNCTION TECHNOLOGY (IWJT) | 2019年

关键词：

Transition metal di-chalcogenide; MoS2; Normally-off; Sputtering; Sulfur powder anneal; MoSi2;

D O I：

10.23919/iwjt.2019.8802622

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

We have successfully fabricated chip-level integrated nMISFETs with sputtered molybdenum disulfide (MoS2) thin channel using sulfur-powder annealing (SPA) and molybdenum disilicide (MoSi2) contact which show n-type-normally-off operation in accumulation. SPA intentionally compensated sulfur vacancies of sputtered MoS2 film. Eventually, we achieved a normally-off operation, which realizes industrial chip-level LSIs with MoS2 channel.

引用

页数：4

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