共 50 条
- [1] RF Modeling of 45nm Low-Power CMOS Technology NANOTECH CONFERENCE & EXPO 2009, VOL 3, TECHNICAL PROCEEDINGS: NANOTECHNOLOGY 2009: BIOFUELS, RENEWABLE ENERGY, COATINGS FLUIDICS AND COMPACT MODELING, 2009, : 628 - +
- [2] Post-Silicon Tuning Capabilities of 45nm Low-Power CMOS Digital Circuits 2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2009, : 110 - +
- [3] CMOS Level Shifters for Low Power Applications using 45nm Technology 2018 3RD INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, COMMUNICATION, COMPUTER, AND OPTIMIZATION TECHNIQUES (ICEECCOT - 2018), 2018, : 867 - 872
- [4] 45nm low-power CMOS SoC technology with aggressive reduction of random variation for SRAM and analog transistors 2008 SYMPOSIUM ON VLSI TECHNOLOGY, 2008, : 125 - 126
- [5] Design of Low-power Arithmetic Logic Circuits for 45 nm CMOS Technology 2022 IEEE 21ST MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (IEEE MELECON 2022), 2022, : 7 - 12
- [7] Activity Analysis at Low Power Supply on 45nm Technology ISTFA 2011: CONFERENCE PROCEEDINGS FROM THE 37TH INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS, 2011, : 367 - 372
- [8] HfSiON gate dielectric for 45nm node low-power device 2006 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PAPERS, 2006, : 109 - +
- [9] A low-power silicon-on-insulator PWM discriminator for biomedical applications ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL V: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 277 - 280