Test and Diagnosis of Power Switches

被引:0
|
作者
Valka, M. [1 ,2 ]
Bosio, A. [1 ]
Dilillo, L. [1 ]
Todri, A. [1 ]
Virazel, A. [1 ]
Girard, P. [1 ]
Debaud, P. [2 ]
Guilhot, S. [2 ]
机构
[1] Univ Montpellier 2, CNRS, LIRMM, Montpellier, France
[2] ST Microelect, Grenoble, France
关键词
Power Switch; Power Management; Design for Test & Diagnosis;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Power-gating techniques have been adopted so far to reduce the static power consumption of an Integrated Circuit (IC). Power gating is usually implemented by means of several power switches. Manufacturing defects affecting power switches can lead to increase the actual static power consumption and, in the worst case they can completely isolate a functional block of the IC. In this paper we present a novel Design for Test & Diagnosis to increase the test quality and diagnosis accuracy of power switches. The proposed approach has been validated through SPICE simulations on ITC'99 benchmark circuits.
引用
收藏
页码:213 / 218
页数:6
相关论文
共 50 条
  • [1] Delay Test for Diagnosis of Power Switches
    Khursheed, Saqib
    Shi, Kan
    Al-Hashimi, Bashir M.
    Wilson, Peter R.
    Chakrabarty, Krishnendu
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2014, 22 (02) : 197 - 206
  • [2] Design for Test and Diagnosis of Power Switches
    Valka, Miroslav
    Bosio, Alberto
    Dilillo, Luigi
    Girard, Patrick
    Virazel, Arnaud
    Debaud, Philippe
    Guilhot, Stephane
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (03)
  • [3] A Fast and Effective DFT for Test and Diagnosis of Power Switches in SoCs
    Huang, Xiaoyu
    Mathew, Jimson
    Shafik, Rishad A.
    Bhattacharjee, Subhasis
    Pradhan, Dhiraj K.
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 1089 - 1092
  • [4] Built-In Self-Test, Diagnosis, and Repair of MultiMode Power Switches
    Wang, Ran
    Zhang, Zhaobo
    Kavousianos, Xrysovalantis
    Tsiatouhas, Yiorgos
    Chakrabarty, Krishnendu
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2014, 33 (08) : 1231 - 1244
  • [5] Testing and diagnosis of power switches in SOCs
    Goel, Sandeep Kumar
    Meijer, Maurice
    de Gyvez, Jose Pineda
    ETS 2006: ELEVENTH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS, 2006, : 145 - +
  • [6] Design-for-Diagnosis Architecture for Power Switches
    Valka, M.
    Bosio, A.
    Dilillo, L.
    Girard, P.
    Virazel, A.
    Debaud, P.
    Guilhot, S.
    2015 IEEE 18TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS 2015), 2015, : 43 - 48
  • [7] Diagnosis of Power Switches with Power-Distribution-Network Consideration
    Tenentes, Vasileios
    Rossi, Daniele
    Khursheed, Saqib
    Al-Hashimi, Bashir M.
    2015 20th IEEE European Test Symposium (ETS), 2015,
  • [8] Structural Test and Diagnosis for Graceful Degradation of NoC Switches
    Atefe Dalirsani
    Stefan Holst
    Melanie Elm
    Hans-Joachim Wunderlich
    Journal of Electronic Testing, 2012, 28 : 831 - 841
  • [9] Structural Test and Diagnosis for Graceful Degradation of NoC Switches
    Dalirsani, Atefe
    Holst, Stefan
    Elm, Melanie
    Wunderlich, Hans-Joachim
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2012, 28 (06): : 831 - 841
  • [10] A test facility for PCSS triggered pulsed power switches
    Swalby, M. E.
    Glover, S. F.
    Zutavern, F. J.
    Reed, K. W.
    Cich, M. J.
    Mar, A.
    Saiz, T. A.
    Horry, M. L.
    White, F. E.
    2007 IEEE PULSED POWER CONFERENCE, VOLS 1-4, 2007, : 101 - +