Comparison of nanoscale metal-oxide-semiconductor field effect transistors

被引：0

作者：

Li, YM ^{[1
]}

Lee, JW ^{[1
]}

Chou, HM ^{[1
]}

机构：

[1] Natl Nano Device Lab, Dept Computat Nanoelect, Hsinchu, Taiwan

来源：

SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2004 | 2004年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, electrical characteristics of nanoscale single-, double-, and all-around-gate silicon-0n-insulator (SOI) devices are computational investigated by using a quantum mechanical simulation. Considering several important properties, such as on/off current ratio, drain induced channel barrier height lowering, threshold voltage roll off, and subthreshold swing, geometry aspect ratio is systematically calculated and characterized among structures. To obtain good operation characteristics, the ratio of channel length and silicon film thickness should be optimized with respect to device structures.

引用

页码：307 / 310

页数：4

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