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- [22] An application of multiple-valued logic to test case generation for software system functional testing 31ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS, 2001, : 35 - 40
- [23] Automatic design of binary and multiple-valued logic gates on RTD series DSD 2005: 8TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, PROCEEDINGS, 2005, : 139 - 142
- [24] Multiple-Valued Input Index Generation Functions: Optimization by Linear Transformation 2012 42ND IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL), 2012, : 185 - 190
- [25] Synthesis of multiple-valued arithmetic circuits using Evolutionary Graph Generation 31ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS, 2001, : 253 - 258
- [28] Formal Design of Multiple-Valued Arithmetic Algorithms over Galois Fields and Its Application to Cryptographic Processor 2012 42ND IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL), 2012, : 110 - 115
- [30] Evolutionary graph generation system with terminal-color constraint - An application to multiple-valued logic circuit synthesis IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2001, E84A (11): : 2808 - 2810