Decoder-based interconnect structure for multi-context FPGAs

被引：2

作者：

Lodi, A ^{[1
]}

Ciccarelli, L ^{[1
]}

Cappelli, A ^{[1
]}

Campi, F ^{[1
]}

Toma, M ^{[1
]}

机构：

[1] Univ Bologna, ARCES, I-40136 Bologna, Italy

来源：

ELECTRONICS LETTERS | 2003年 / 39卷 / 04期

关键词：

D O I：

10.1049/el:20030204

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We conclude by tabulating the complexity of the attack (in terms of MAC verifications) for some typical values of m and n.

引用

页码：362 / 364

页数：3

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