Sequential circuit implementation method for multi-context scrubbing operations on FPGAs

被引:1
|
作者
Murakami, Kurea [1 ]
Watanabe, Minoru [1 ]
机构
[1] Shizuoka Univ, Elect & Elect Engn, 3-5-1 Johoku, Hamamatsu, Shizuoka 4328561, Japan
关键词
field programmable gate array (FPGA); multi-context scrubbing; partial reconfiguration; space environment; scrubbing operation; CONFIGURATION; RADIATION;
D O I
10.1109/ISCAS51556.2021.9401291
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a proposal for a sequential circuit implementation method for multi-context scrubbing operations that can treat soft-error and permanent failure issues simultaneously. Although multi-context scrubbing operations can treat permanent failure issues on field programmable gate arrays (FPGAs), implementing sequential circuits is difficult because the flip-flop location must be changed while maintaining sequential operations. Therefore, no multi-context scrubbing operation including a sequential circuit has been demonstrated to date. As described herein, a multi-context scrubbing operation using a simple 8-bit counter circuit has been demonstrated perfectly on an Artix-7 FPGA (XC7A35TICSG324-1L). This paper presents experimentally obtained results of that demonstration.
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页数:5
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  • [1] Multi-context scrubbing method
    Fujimori, Takumi
    Watanabe, Minoru
    [J]. 2017 IEEE 60TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2017, : 1548 - 1551
  • [2] Dynamic reconfiguration architectures for multi-context FPGAs
    Birk, Yitzhak
    Fiksman, Evgeny
    [J]. COMPUTERS & ELECTRICAL ENGINEERING, 2009, 35 (06) : 878 - 903
  • [3] Automated design flow for multi-context FPGAs
    Canto, Enrique
    Lopez, Mariano
    Fons, Francesc
    del Rio, Joaquin
    Manuel, Antoni
    [J]. IEEE MWSCAS'06: PROCEEDINGS OF THE 2006 49TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS,, 2006, : 470 - +
  • [4] Optical multi-context scrubbing operation on a redundant system
    Ando, Kakeru
    Watanabe, Minoru
    Watanabe, Nobuya
    [J]. OPTICS EXPRESS, 2023, 31 (23) : 38529 - 38539
  • [5] Decoder-based interconnect structure for multi-context FPGAs
    Lodi, A
    Ciccarelli, L
    Cappelli, A
    Campi, F
    Toma, M
    [J]. ELECTRONICS LETTERS, 2003, 39 (04) : 362 - 364
  • [6] Optical Multi-Context Blind Scrubbing for Field Programmable Gate Arrays
    Takaki, Yusuke
    Watanabe, Minoru
    [J]. IEEE PHOTONICS JOURNAL, 2020, 12 (06):
  • [7] Design and Implementation of Multi-Context Rewriting Induction
    Sato, Haruhiko
    Kurihara, Masahito
    [J]. INTERNATIONAL MULTICONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS (IMECS 2010), VOLS I-III, 2010, : 350 - 355
  • [8] The effect of gate voltage boosting on the power efficiency of multi-context FPGAs
    Razzaq, Anas
    Sani, Sajjad Rostami
    Ye, Andy Gean
    [J]. INTEGRATION-THE VLSI JOURNAL, 2022, 86 : 30 - 43
  • [9] A taxonomy approach for multi-context trust: Formalization and implementation
    Joaquin, Federico
    Tamargo, Luciano H.
    Garcia, Alejandro J.
    [J]. EXPERT SYSTEMS WITH APPLICATIONS, 2019, 127 : 295 - 307
  • [10] USING 3D INTEGRATION TECHNOLOGY TO REALIZE MULTI-CONTEXT FPGAS
    Cevrero, Alesandro
    Athanasopoulosi, Panagiotis
    Parandeh-Afshar, Hadi
    Skerlj, Maurizio
    Brisk, Philip
    Leblebici, Yusuf
    Ienne, Paolo
    [J]. FPL: 2009 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2009, : 507 - +