A high Power Efficiency Reconfigurable Processor for Multimedia Processing

被引:0
|
作者
Dai, Peng [1 ]
Wang, Xin'an [1 ]
Zhang, Xing [2 ]
Zhao, Qiuqi [3 ]
Zhou, Yan [3 ]
Sun, Yachun [3 ]
机构
[1] Peking Univ, Shenzhen Grad Sch, Key Lab Integrated Microsyst Sci & Engn Applicat, Shenzhen 518055, Peoples R China
[2] Peking Univ, Beijing 100871, Peoples R China
[3] Shenzhen Natl Intergrated Circuit Design Ind Ctr, Shenzhen 51855, Peoples R China
关键词
reconfigurable processor; multimedia; power efficiency; coarse-grain;
D O I
10.1109/ASICON.2009.5351604
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Nowadays mobile multimedia raise the demand of higher performance, larger amounts of flexibility as well as strict energy constrains. Reconfigurable Multimedia Array Processor (ReMAP) provides architecture with high programmable coarse-grained computational resources and flexible interconnect. To reduce the power consumption of memory access, we present an approach for computing control of the reconfigurable processor. By configuring the operation and settling down the data path of computational resources as initialization, data stream in processor accomplishing algorithm implement without access context memory frequently, which can achieve barely the same energy consumption as ASICs.(1)
引用
收藏
页码:67 / +
页数:2
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