Dynamically reconfigurable processor for multimedia application

被引：0
|
作者：
Mlinaric, H [1 ]
Duracic, K [1 ]
Kovac, M [1 ]
机构：
[1] Univ Zagreb, Fac Elect Engn & Comp, Dept Control & Comp Engn Automat, Comp Syst & Proc Grp, Zagreb 41000, Croatia
来源：
IWSSIP 2005: Proceedings of the 12th International Worshop on Systems, Signals & Image Processing | 2005年
关键词：
reconfigurable computing; FPGA; multimedia; MPEG;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper presents a dynamically reconfigurable processor designed for processing data in multimedia application. The work was done as resource of PhD. research and years of experience in processor architecture and multimedia audio and video application design. The object of this research is to build a high performance reconfigurable processor providing highly scalable architecture and transparent hardware reconfigurable for the multimedia application such as, video encoding/decoding, audio encoding/decoding, speech encoding/decoding.
引用
收藏
页码：141 / 144
页数：4
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