Multi-level communication synthesis of heterogeneous multilanguage specification

被引：0

作者：

Hessel, F ^{[1
]}

Coste, P ^{[1
]}

Nicolescu, G ^{[1
]}

LeMarrec, P ^{[1
]}

Zergainoh, N ^{[1
]}

Jerraya, A ^{[1
]}

机构：

[1] TIMA Lab, F-38031 Grenoble, France

来源：

2000 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS | 2000年

关键词：

D O I：

10.1109/ICCD.2000.878332

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The complexity of modern embedded systems requires the cooperation of several reams belonging to different cultures and using different languages as well as the reuse of software, hardware and communication IP modules at the early design steps. The key issue for the design of such systems is the overall system validation and the synthesis of the communication between the different subsystems. In this paper, we focus on the problem of multi-level communication synthesis and show the results of the application of this methodology on an example. Designers get feedback at all design steps via the cosimulation engine that permits fast evaluation.

引用

页码：525 / 530

页数：6

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