A New Unified Model for Channel Thermal Noise of Deep Sub-micron RFCMOSC

被引:2
|
作者
Ong, S. N. [1 ,2 ]
Chew, K. W. J. [2 ]
Yeo, K. S. [1 ]
Chan, L. H. K. [1 ]
Loo, X. S. [1 ,2 ]
Boon, C. C. [1 ]
Do, M. A. [1 ]
机构
[1] Nanyang Technol Univ, 50 Nanyang Ave, Singapore 639798, Singapore
[2] Chartered Semicond Mfg Ltd, Singapore 738406, Turkey
关键词
Channel thermal noise; high-frequency noise modeling; mobility degradation; MOSFET; noise of deep sub-micron MOSFET; vertical electric field; MOSFETS; DESIGN;
D O I
10.1109/RFIT.2009.5383701
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new unified model for circuit simulation is presented to predict the high frequency channel thermal noise of deep sub-micron MOSFETs in strong inversion region. Based on the new channel thermal noise model, the simulated channel thermal noise spectral densities of the devices fabricated in a 0.13 mu m RFCMOS technology process are compared to the channel noise directly extracted from RF noise measurements.
引用
收藏
页码:280 / 283
页数:4
相关论文
共 50 条
  • [31] Deep sub-micron gate diamond MISFETs
    Matsudaira, H
    Takuya, A
    Umezawa, H
    Miyamoto, S
    Ishizaka, H
    Tachiki, M
    Kawarada, H
    [J]. DIAMOND AND RELATED MATERIALS, 2003, 12 (10-11) : 1814 - 1818
  • [32] Systematic defects in deep sub-micron technologies
    Kruseman, B
    Majhi, A
    Hora, C
    Eichenberger, S
    Meirlevede, J
    [J]. INTERNATIONAL TEST CONFERENCE 2004, PROCEEDINGS, 2004, : 290 - 299
  • [33] Crosstalk estimation in deep sub-micron VLSI
    Sun, LL
    Peng, R
    [J]. 2004 4th INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY PROCEEDINGS, 2004, : 891 - 894
  • [34] FANTCAD: ATPG for the deep sub-micron era
    Yamamoto, T
    Karasawa, N
    Hamada, S
    Aikyo, T
    [J]. FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 1995, 31 (02): : 167 - 172
  • [35] FANTCAD: ATPG for the deep sub-micron era
    Fujitsu Ltd, Kawasaki, Japan
    [J]. Fujitsu Sci Tech J, 2 (167-172):
  • [36] Design of deep sub-micron CMOS circuits
    Joshi, R
    Roy, K
    [J]. 16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 15 - 16
  • [37] Reliability scaling in deep sub-micron MOSFETs
    Horiuchi, T
    Ito, H
    Kimizuka, N
    [J]. MICROELECTRONIC DEVICE AND MULTILEVEL INTERCONNECTION TECHNOLOGY II, 1996, 2875 : 108 - 117
  • [38] A new algorithm for computing the "effective capacitance" in deep sub-micron circuits
    Macys, R
    McCormick, S
    [J]. IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, : 313 - 316
  • [39] Sub-continuum thermal simulations of deep sub-micron devices under ESD conditions
    Sverdrup, Per G.
    Banerjee, Kaustav
    Dai, Changhong
    Shih, Wei-kai
    Dutton, Robert W.
    Goodson, Kenneth E.
    [J]. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, 2000, : 54 - 57
  • [40] Thermal conductivity analysis of a new sub-micron sized polystyrene foam
    Almeida, F. A.
    Beyrichen, H.
    Dodamani, N.
    Caps, R.
    Mueller, A.
    Oberhoffer, R.
    [J]. JOURNAL OF CELLULAR PLASTICS, 2021, 57 (04) : 493 - 515