Pile-up veto LO trigger system for LHCb using large FPGA's

被引：0

作者：

van Beuzekom, MG ^{[1
]}

Vink, W ^{[1
]}

Wiggers, LW ^{[1
]}

Zupan, M ^{[1
]}

机构：

[1] NIKHEF H, NL-1009 DB Amsterdam, Netherlands

来源：

PROCEEDINGS OF THE EIGHTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS | 2002年 / 2002卷 / 03期

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

A zero-level trigger system for detecting multiple events in a bunch crossing is in development at NIKHER The fraction of multiple events at LHCb is high; a veto on those events frees bandwidth for lowering cuts of zero-level hadronic triggers. The detection is performed by histogramming hit combinations of 2 dedicated Silicon-detector planes and selecting vertex peaks using Mgate Xilinx FPGXs. Details of the logic and implementation are presented.

引用

页码：251 / 255

页数：5

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