Efficient SAT-based unbounded symbolic model checking using circuit cofactoring

被引:35
|
作者
Ganai, MK [1 ]
Gupta, A [1 ]
Ashar, P [1 ]
机构
[1] NEC Labs Amer, Princeton, NJ 08540 USA
关键词
D O I
10.1109/ICCAD.2004.1382631
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We describe an efficient approach for SAT-based quantifier elimination that significantly improves the performance of pre-image and fixed-point computation in SAT-based unbounded symbolic model checking (UMC). The proposed method captures a larger set of new states per SAT-based enumeration step during quantifier elimination, in comparison to previous approaches. The novelty of our approach is in the use of circuit-based cofactoring to capture a large set of states, and in the use of a functional hashing based simplified circuit graph to represent the captured states. We also propose a number of heuristics to further enlarge the state set represented per enumeration, thereby reducing the number of enumeration steps. We have implemented our techniques in a SAT-based UMC framework where we show the effectiveness of SAT-based existential quantification on public benchmarks, and on a number of large industry designs that were hard to model check using purely BDD-based techniques. We show several orders of improvement in time and space using our approach over previous CNF-based approaches. We also present controlled experiments to demonstrate the role of several heuristics proposed in the paper. Importantly, we were able to prove using our method the correctness of a safety property in an industry design that could not be proved using other known approaches.
引用
收藏
页码:510 / 517
页数:8
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