共 50 条
- [31] Simultaneous SAT-based model checking of safety properties [J]. HARDWARE AND SOFTWARE VERIFICATION AND TESTING, 2006, 3875 : 56 - 75
- [32] Proving ∀μ-calculus properties with SAT-based model checking [J]. FORMAL TECHNIQUES FOR NETWORKED AND DISTRIBUTED SYSTEMS - FORTE 2005, 2005, 3731 : 113 - 127
- [33] Frontend model generation for SAT-based property checking [J]. 2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2, 2005, : 914 - 919
- [34] Improving SAT-Based Combinational Equivalence Checking Through Circuit Preprocessing [J]. 2008 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2008, : 40 - +
- [35] Efficient SAT-based Circuit Initialization for Larger Designs [J]. 2014 27TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2014 13TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID 2014), 2014, : 62 - 67
- [36] Enhancing SAT-based bounded model checking using sequential logic implications [J]. 17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA, 2004, : 784 - 787
- [37] SAT-Based ATL Satisfiability Checking [J]. KR2020: PROCEEDINGS OF THE 17TH INTERNATIONAL CONFERENCE ON PRINCIPLES OF KNOWLEDGE REPRESENTATION AND REASONING, 2020, : 539 - 549
- [38] Modular Checking of C programs using SAT-based Bounded Model Checker [J]. APSEC 09: SIXTEENTH ASIA-PACIFIC SOFTWARE ENGINEERING CONFERENCE, PROCEEDINGS, 2009, : 515 - 522
- [39] Lazy Abstraction and SAT-Based Reachability in Hardware Model Checking [J]. PROCEEDINGS OF THE 12TH CONFERENCE ON FORMAL METHODS IN COMPUTER-AIDED DESIGN (FMCAD 2012), 2012, : 173 - 181
- [40] SAT-based bounded model checking for SE-LTL [J]. SNPD 2007: EIGHTH ACIS INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING, ARTIFICIAL INTELLIGENCE, NETWORKING, AND PARALLEL/DISTRIBUTED COMPUTING, VOL 3, PROCEEDINGS, 2007, : 582 - +