New Algorithms for Address Decoder Delay Faults and Bit Line Imbalance Faults

被引：7

作者：

van de Goor, Ad J. ^{[1
]}

Hamdioui, Said ^{[2
]}

Gaydadjiev, Georgi N. ^{[2
]}

Al-Ars, Zaid ^{[2
]}

机构：

[1] ComTex, Voorwillenseweg 201, NL-2807 CAX Gouda, Netherlands

[2] Delft Univ Technol, Comp Engn Lab, NL-2628 CD Delft, Netherlands

来源：

2009 ASIAN TEST SYMPOSIUM, PROCEEDINGS | 2009年

关键词：

Memory testing; Address Decoder Delay Faults; Address methods; Data backgrounds; Bit Line Imbalance Faults;

D O I：

10.1109/ATS.2009.87

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Due to the rapid decrease of technology feature size speed related faults, such as Address Decoder Delay Faults (ADDFs), are becoming very important In addition, increased leakage currents demand for improved tests for Bit Line Imbalance Faults (BLIFs)(caused by memory cell pass transistor leakage). This paper contributes to new and improved algorithms for detecting these faults First it provides an improved version of existing GalPal algorithm and introduces two new algorithms to detect ADDFs, the paper also shines a new light on the use of the different stress combinations (counting methods, data-backgrounds) and their importance for the detection of ADDFs Second, it provides an improved algorithm for detecting it increases the defect converage by being able to detect lower leakage currents

引用

页码：391 / +

页数：2

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