共 50 条
- [21] Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2013, E96C (04): : 538 - 545
- [22] Power supply net for adiabatic circuits [J]. INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2004, 3254 : 413 - 422
- [23] TRANSIENTS IN POWER-SUPPLY CIRCUITS [J]. TELECOMMUNICATIONS AND RADIO ENGINEERING, 1974, 28-9 (08) : 101 - 104
- [25] Glitch-Free Design for Multi-Threshold CMOS NCL Circuits [J]. GLSVLSI 2009: PROCEEDINGS OF THE 2009 GREAT LAKES SYMPOSIUM ON VLSI, 2009, : 215 - 220
- [26] On-Chip Power-on Reset Strategy and I/O Power Supply Detection for VLSI Circuits [J]. ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,, 2009, : 533 - +
- [28] Total power minimization in glitch-free CMOS circuits considering process variation [J]. 21ST INTERNATIONAL CONFERENCE ON VLSI DESIGN: HELD JOINTLY WITH THE 7TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2008, : 527 - 532
- [29] Power Supply Voltage Detection and Clamping Circuit for 3-D Integrated Circuits [J]. 2014 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2014,