Work in progress: Incorporating system-level design tools into digital design and capstone courses

This paper describes our ongoing effort to create a set of laboratory exercises and projects of varying complexities suitable for undergraduate, upper level digital design and capstone courses. The laboratory exercises incorporate system-level design tools and state-of-the-art FPGA boards. Specifically, this work shares the experience of using software tools such as Simulink, an assortment of Matlab toolboxes, Xilinx System Generator, Xilinx Integrated System Environment (ISE) and mentor graphics FPGA design and verification tools, and an assortment of Xilinx-based FPGA boards to create cross-disciplinary laboratory exercises and capstone projects in the areas of digital design, computer architecture, and signal and image processing. The developed laboratory assignments allow students to experiment with alternative forms of design and implementation technologies. Evaluation and assessment tools are being developed to measure the impacts of these projects on student learning and to guide future modifications of these projects.