Simulation of flicker noise in gate-all-around Silicon Nanowire MOSFETs including interface traps

被引：4
|
作者：
Anandan, P. [1 ]
Nithya, A. [1 ]
Mohankumar, N. [1 ]
机构：
[1] SKP Engn Coll, Tiruvannamalai, Tamil Nadu, India
来源：
MICROELECTRONICS RELIABILITY | 2014年 / 54卷 / 12期
关键词：
Silicon Nanowire MOSFET; GAA (gate-all-around); Flicker noise; Interface traps;
D O I：
10.1016/j.microrel.2014.07.145
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a systematic investigation of flicker noise in Gate-all-around Silicon Nanowire MOSFET. The 1/f noise is simulated in the presence and absence of interface traps. Moreover the device is simulated under various distributions (Exponential, Gaussian, Uniform) of noise source. Nonuniformity in the-interface of the oxide/semiconductor region as gave rise to increase the threshold voltage, there by increasing the leakage current. The effect of interface traps on different distribution has been explored in detail. The noise spectral density variations for various traps shows significant increase in flicker noise up to a magnitude of under 6 "dB" for weak signals. The simulated results matches with the calibrated experimental data. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码：2723 / 2727
页数：5
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