Macromodeling with spice for the voltage breakdown behavior in bipolar junction and field-effect transistors

被引：0

作者：

Li, YM ^{[1
]}

Connelly, JA ^{[1
]}

机构：

[1] Georgia State Univ, Sch Elect & Comp Engn, Atlanta, GA 30303 USA

来源：

2003 SOUTHWEST SYMPOSIUM ON MIXED-SIGNAL DESIGN | 2003年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents two macromodels using SPICE primitives to simulate the static current-voltage (I-V) output characteristics of bipolar junction and field-effect transistors (BJTs and FETs) with the collector-emitter and drain-source breakdown voltages taken into account. Both macromodels use a reverse biased diode and a resistor in series with a current-controlled or voltage-controlled voltage source. A practical circuit adopting the macromodel for the BJT (MPSA06) illustrates the voltage-clamped features.

引用

页码：166 / 169

页数：4

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