Reliability issues in advanced High k/metal gate stacks for 45 nm CMOS applications

被引：1
|
作者：
Groeseneken, G. [1 ,2 ]
Aoulaiche, M. [1 ,2 ]
De Gendt, S. [1 ,3 ]
Degraeve, R. [1 ]
Houssa, M. [1 ,2 ]
Kauerauf, T. [1 ,2 ]
Pantisano, L. [1 ]
机构：
[1] IMEC, Kapeldreef 75, B-3001 Louvain, Belgium
[2] Katholieke Univ Leuven, ESAT Dept, Leuven, Belgium
[3] Katholieke Univ Leuven, Dept Chem, Leuven, Belgium
来源：
ASDAM '06: SIXTH INTERNATIONAL CONFERENCE ON ADVANCED SEMICONDUCTOR DEVICES AND MICROSYSTEMS, CONFERENCE PROCEEDINGS | 2006年
关键词：
D O I：
10.1109/ASDAM.2006.331143
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Some recent insights in reliability issues of high k/metal gate stacks for the 45 nm CMOS node and beyond are discussed The problem of transient charging effects leading to threshold voltage instability is illustrated It is shown that nitridation of Hf-silicate layers leads to severe degradation of the Negative-Bias-Instability (NBTI) lifetime. Some insights in the mechanisms of Time-dependent-Dielectric breakdown (TDDB) are discussed and illustrated.
引用
收藏
页码：15 / 19
页数：5
相关论文
共 50 条
  • [41] RF Power Potential of High-k Metal Gate 28 nm CMOS Technology
    Ouhachi, R.
    Pottrain, A.
    Ducatteau, D.
    Okada, E.
    Gaquiere, C.
    Gloria, D.
    2013 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), VOLS 1-2, 2013, : 181 - 184
  • [42] From strain to high-k/metal gate - the 65-45 nm transition
    James, Dick
    2008 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2008, : 76 - 81
  • [43] Reliability issues for high-k gate dielectrics
    Oates, AS
    2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, 2003, : 923 - 926
  • [44] The Role of Oxygen in the Development of Hf-base High-k/Metal Gate Stacks for CMOS Technologies
    Cartier, E.
    PHYSICS AND TECHNOLOGY OF HIGH-K MATERIALS 8, 2010, 33 (03): : 83 - 94
  • [45] Metal/High-k/Metal Nanocrystal/SiO2 Gate Stacks for NAND Flash Applications
    Mahapatra, Souvik
    Singh, Pawan K.
    PHYSICS AND TECHNOLOGY OF HIGH-K GATE DIELECTRICS 7, 2009, 25 (06): : 481 - 490
  • [46] High-k gate stacks for planar, scaled CMOS integrated circuits
    Huff, HR
    Hou, A
    Lim, C
    Kim, Y
    Barnett, J
    Bersuker, G
    Brown, GA
    Young, CD
    Zeitzoff, PM
    Gutt, J
    Lysaght, P
    Gardner, MI
    Murto, RW
    MICROELECTRONIC ENGINEERING, 2003, 69 (2-4) : 152 - 167
  • [47] A comparative study of hfTaON/SiO2 and HfON/SiO2 gate stacks with TaN metal gate for advanced CMOS applications
    Yu, Xiongfei
    Yu, Mingbin
    Zhu, Chunxiang
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (02) : 284 - 290
  • [48] CMOS integration issues with high-k gate stack
    Kwong, DL
    IPFA 2004: PROCEEDINGS OF THE 11TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS, 2004, : 17 - 20
  • [49] Reliability of Metal Gate / High-k devices and its impact on CMOS technology scaling
    Andreas Kerber
    MRS Advances, 2017, 2 (52) : 2973 - 2982
  • [50] Bulk Planar 20nm High-K/Metal Gate CMOS Technology Platform for Low Power and High Performance Applications
    Cho, H. -J.
    Seo, K. -I.
    Jeong, W. C.
    Kim, Y. -H.
    Lim, Y. D.
    Jang, W. W.
    Hong, J. G.
    Suk, S. D.
    Li, M.
    Ryou, C.
    Rhee, H. S.
    Lee, J. G.
    Kang, H. S.
    Son, Y. S.
    Cheng, C. L.
    Hong, S. H.
    Yang, W. S.
    Nam, S. W.
    Ahn, J. H.
    Lee, D. H.
    Park, S.
    Sadaaki, M.
    Cha, D. H.
    Kim, D. W.
    Sim, S. P.
    Hyun, S.
    Koh, C. G.
    Lee, B. C.
    Lee, S. G.
    Kim, M. C.
    Bae, Y. K.
    Yoon, B.
    Kang, S. B.
    Hong, J. S.
    Choi, S.
    Sohn, D. K.
    Yoon, J. S.
    Chung, C.
    2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2011,
12345