Reliability issues in advanced High k/metal gate stacks for 45 nm CMOS applications

被引:1
|
作者
Groeseneken, G. [1 ,2 ]
Aoulaiche, M. [1 ,2 ]
De Gendt, S. [1 ,3 ]
Degraeve, R. [1 ]
Houssa, M. [1 ,2 ]
Kauerauf, T. [1 ,2 ]
Pantisano, L. [1 ]
机构
[1] IMEC, Kapeldreef 75, B-3001 Louvain, Belgium
[2] Katholieke Univ Leuven, ESAT Dept, Leuven, Belgium
[3] Katholieke Univ Leuven, Dept Chem, Leuven, Belgium
关键词
D O I
10.1109/ASDAM.2006.331143
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Some recent insights in reliability issues of high k/metal gate stacks for the 45 nm CMOS node and beyond are discussed The problem of transient charging effects leading to threshold voltage instability is illustrated It is shown that nitridation of Hf-silicate layers leads to severe degradation of the Negative-Bias-Instability (NBTI) lifetime. Some insights in the mechanisms of Time-dependent-Dielectric breakdown (TDDB) are discussed and illustrated.
引用
收藏
页码:15 / 19
页数:5
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