Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation

被引：30

作者：

Alvarado, Joaquin ^{[1
]}

Iniguez, Benjamin ^{[2
]}

Estrada, Magali ^{[3
]}

Flandre, Denis ^{[1
]}

Cerdeira, Antonio ^{[3
]}

机构：

[1] Catholic Univ Louvain, Microelect Lab, B-1348 Louvain, Belgium

[2] Univ Rovira & Virgili, Dept Elect Engn, Tarragona 43007, Spain

[3] IPN, Ctr Invest & Estudios Avanzados, Mexico City 07360, DF, Mexico

来源：

INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS | 2010年 / 23卷 / 02期

关键词：

double-gate modelling; doped double-gate MOSFET; Verilog-AMS; circuit simulation; COMPACT MODEL;

D O I：

10.1002/jnm.725

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Recently we developed a model for symmetric double-gate MOSFETs (SDDGM) that, for the first time, considers the doping concentration in the Si film in the complete range from 1 X 10(14) to 3 x 10(18) cm(-3). The model covers a wide range of technological parameters and includes short channel effects. It was validated for different devices using data from simulations, as well as measured in real devices. In this paper, we present the implementation in Verilog-A code of this model, which allows its introduction in commercial simulators. The Verilog-A implementation was optimized to achieve reduction in computational time, as well as good accuracy. Results are compared with data from 2D simulations, showing a very good agreement in all transistor operation regions. Copyright (C) 2009 John Wiley & Sons, Ltd.

引用

页码：88 / 106

页数：19

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