Discrete wavelet transform: Architectures, design and performance issues

被引:42
|
作者
Weeks, M [1 ]
Bayoumi, M
机构
[1] Georgia State Univ, Dept Comp Sci, Atlanta, GA 30303 USA
[2] Univ Louisiana, Ctr Adv Comp Studies, Lafayette, LA 70504 USA
关键词
wavelet transforms; computer architecture; digital filters; digital signal processors; discrete transforms;
D O I
10.1023/A:1023648531542
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Due to the demand for real time wavelet processors in applications such as video compression [1], Internet communications compression [2], object recognition [3], and numerical analysis, many architectures for the Discrete Wavelet Transform (DWT) systems have been proposed. This paper surveys the different approaches to designing DWT architectures. The types of architectures depend on whether the application is 1-D, 2-D, or 3-D, as well as the style of architecture: systolic, semi-systolic, folded, digit-serial, etc. This paper presents an overview and evaluation of the architectures based on the criteria of latency, control, area, memory, and number of multipliers and adders. This paper will give the reader an indication of the advantages and disadvantages of each design.
引用
收藏
页码:155 / 178
页数:24
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