Discrete wavelet transform IPcore design for image compression

被引：0
|
作者：
Fu, WH
Meng, LM
Wang, XY
机构：
来源：
2004 7TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, VOLS 1-3 | 2004年
关键词：
wavelet; image compression; IPcore; FPGA; distributed arithmetic;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Discrete wavelet transform (DWT), which is recently used by some international standard organizations in image compression protocols, has an excellent performance on multiresolution representation. Because of DWT's computation-intensive nature. however, it seldom meets the application of real-time video system. Field programmable gate array (FPGA) has the advantages as parallel. high-speed, and easy-modify. These merits make FPGA the appropriate choice for the DWT implementations. This paper describes an IPcore design based on hardware describe language (HDL), and implemented on FPGA device. The core uses distributed arithmetic. parallel operating, and pipelining design. In addition, IPcore technology protects and encapsulates the design of image compression core.
引用
收藏
页码：547 / 550
页数：4
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