共 50 条
- [31] Dynamic Associative Caches: Reducing Dynamic Energy of First Level Caches [J]. 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2014, : 271 - 277
- [32] Design of an adjustable-way set-associative cache [J]. 2001 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING, VOLS I AND II, CONFERENCE PROCEEDINGS, 2001, : 315 - 318
- [33] Improved Procedure Placement for Set Associative Caches [J]. PROCEEDINGS OF THE 2010 INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURES AND SYNTHESIS FOR EMBEDDED SYSTEMS (CASES '10), 2010, : 147 - 156
- [34] Partial Tag Comparison: A new technology for power-efficient set-associative cache designs [J]. 17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA, 2004, : 183 - 188
- [35] Reducing Dynamic Energy of Set-Associative L1 Instruction Cache by Early Tag Lookup [J]. 2015 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED), 2015, : 49 - 54
- [36] An improved approach for set-associative instruction cache partial analysis [J]. APPLIED COMPUTING 2008, VOLS 1-3, 2008, : 360 - 367
- [37] SET-ASSOCIATIVE CACHE SIMULATION USING GENERALIZED BINOMIAL TREES [J]. ACM TRANSACTIONS ON COMPUTER SYSTEMS, 1995, 13 (01): : 32 - 56
- [38] A low energy set-associative I-Cache with extended BTB [J]. ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 2002, : 187 - 192
- [39] IPStash: A set-associative memory approach for efficient IP-lookup [J]. IEEE INFOCOM 2005: THE CONFERENCE ON COMPUTER COMMUNICATIONS, VOLS 1-4, PROCEEDINGS, 2005, : 992 - 1001