An Efficient Software Implementation of Correctly Rounded Operations Extending FMA: a plus b plus c and a x b plus c x d

被引：0
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作者：
Lauter, Christoph [1 ]
机构：
[1] UPMC Univ Paris 06, Sorbonne Univ, LIP6, UMR 7606, F-75005 Paris, France
来源：
2017 FIFTY-FIRST ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS, AND COMPUTERS | 2017年
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D O I：
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中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In its 2008 revision, the IEEE754 Standard for Floating-Point Arithmetic added the Fused-Multiply-And-Add (FMA) operation, computing a x b + c without intermediate rounding. This operation enables faster scalar products and doubled-precision arithmetic. The IEEE754 Standard is again undergoing revision. We propose an efficient software implementation of two additional operations: Fused-Multiply-Twice-And-Add, a x b + c x d and Fused-Add-Add a + b + c. Our implementation guarantees correct rounding in all rounding modes and IEEE754 compliant signaling. Although intended for reference purposes, with a 94 resp. 104 cycle latency, our software implementations are pretty fast.
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页码：452 / 456
页数：5
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