Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits

被引:0
|
作者
Huang, Shih-Hsu [1 ]
Yeh, Hua-Hsin [1 ]
机构
[1] Chung Yuan Christian Univ, Dept Elect Engn, Chungli, Taiwan
关键词
electronic design automation; high-level design stage; design partitioning; layer assignment; three-dimensional integrated circuits; temperature increase; TECHNOLOGY; POWER;
D O I
10.1587/transfun.E97.A.1699
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Because dielectrics between active layers have low thermal conductivities, there is a demand to reduce the temperature increase in three-dimensional integrated circuits (3D ICs). This paper demonstrates that, in the design of 3D ICs, different layer assignments often lead to different temperature increases. Based on this observation, we are motivated to perform temperature-aware layer assignment. Our work includes two parts. Firstly, an integer linear programming (1LP) approach that guarantees a minimum temperature increase is proposed. Secondly, a polynomialtime heuristic algorithm that reduces the temperature increase is proposed. Compared with the previous work, which does not take the temperature increase into account, the experimental results show that both our 1LP approach and our heuristic algorithm produce a significant reduction in the temperature increase with a very small area overhead.
引用
收藏
页码:1699 / 1708
页数:10
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