Design of Two Channel Multiplierless Filterbank using Common Sub-expression Elimination

被引：0
|
作者：
Sharma, I. [1 ]
Kumar, A. [1 ,2 ]
Singh, G. K. [3 ]
机构：
[1] PDPM Indian Inst Informat Technol Design & Mfg Ja, Jabalpur 482005, MP, India
[2] Gwangju Inst Sci & Technol, Sch Elect Engn & Comp Sci, Gwangju, South Korea
[3] Indian Inst Technol, Dept Elect Engn, Roorkee 247667, Uttrakhand, India
来源：
2016 INTERNATIONAL CONFERENCE ON SIGNAL AND INFORMATION PROCESSING (ICONSIP) | 2016年
关键词：
Two-channel filter; Canonical sign digit (CSD); Common sub-expression elimination(CSE); Cuckoo search algorithm (CSA); PARTICLE SWARM OPTIMIZATION; FIR FILTERS; ALGORITHM; DIGIT;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a simple and efficient design technique for a two-channel multiplier less filterbank using common sub-expression elimination (CSE) algorithm for a given stop-band attenuation (As) and channel overlapping. Novelty of this paper lies in the unique utilization of cuckoo search algorithm for exploiting both quantized coefficients and canonical sign digit (CSD) converted coefficients such that the magnitude response of prototype filter is optimized to 0.7071 at frequency omega=pi/2. In the proposed method, hardware reduction in term of adders is achieved using CSE. A comparative analysis of various CSE algorithms with the proposed method has also been made for designing two-channel filter bank. Performance of the proposed algorithm is illustrated in terms of number of adders (NA) and adder gain (AG).
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收藏
页数：5
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