A new poly-Si thin-film transistor with poly-Si/a-Si double active layer

被引：4
|
作者：
Park, KC [1 ]
Choi, KY
Yoo, JS
Han, MK
机构：
[1] Seoul Natl Univ, Sch Elect Engn, Seoul 151742, South Korea
[2] Samsung Elect Co, LCD R&D Grp, Kyungki Do 449900, South Korea
来源：
IEEE ELECTRON DEVICE LETTERS | 2000年 / 21卷 / 10期
关键词：
crystallization depth control; current path; poly-Si/a-Si; poly-Si TFTs; stability;
D O I：
10.1109/55.870610
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new poly-Si TFT employing a rather thick poly-Si (400 Angstrom)/a-Si(4000 Angstrom) double active layer is proposed and fabricated in order to improve the stability of poly-Si TFT without sacrificing the on/off current ratio. Due to the thick double layer, the on-state drain current of the proposed TFT flows through a broad current path near the drain junction so that the current density in the drain depletion region where large electric field is applied is considerably reduced. Consequently, additional trap state generation attributed to large current flow and large electric field in poly-Si channel decreases and the electrical stability of the proposed device has been considerably improved.
引用
收藏
页码：488 / 490
页数：3
相关论文
共 50 条
  • [31] Fabrication of a high-performance poly-Si thin-film transistor using a poly-Si film prepared by silicide-enhanced rapid thermal annealing process
    Yong Ho Yang
    Kyung Min Ahn
    Seung Mo Kang
    Sun Hong Moon
    Byung Tae Ahn
    Electronic Materials Letters, 2014, 10 : 1081 - 1085
  • [32] Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor
    Chien, Feng-Tso
    Hung, Chih-Ping
    Chiu, Hsien-Chin
    Kang, Tsung-Kuei
    Cheng, Ching-Hwa
    Tsai, Yao-Tsung
    COATINGS, 2019, 9 (04):
  • [33] Wireless Power Supply to Artificial Retina using Poly-Si Thin-Film Transistor
    Yamamoto, Yuki
    Ishizaki, Toshio
    Matsuda, Tokiyoshi
    Kimura, Mutsumi
    2016 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI (IMFEDK), 2016, : 50 - 51
  • [34] CURRENT DLTS MEASUREMENTS ON POLY-SI THIN-FILM TRANSISTORS
    AYRES, JR
    MICROELECTRONIC ENGINEERING, 1992, 19 (1-4) : 179 - 182
  • [35] Analysis of poly-Si thin film p+-n-n+ homojunction solar cell and heterojunction solar cell with and without a thin μc-Si layer at the interface of a-Si and poly-Si layers
    Letha, A. J.
    Hwang, H. L.
    EUROPEAN PHYSICAL JOURNAL-APPLIED PHYSICS, 2009, 46 (02):
  • [36] Fabrication of a High-Performance Poly-Si Thin-Film Transistor Using a Poly-Si Film Prepared by Silicide-Enhanced Rapid Thermal Annealing Process
    Yang, Yong Ho
    Ahn, Kyung Min
    Kang, Seung Mo
    Moon, Sun Hong
    Ahn, Byung Tae
    ELECTRONIC MATERIALS LETTERS, 2014, 10 (06) : 1081 - 1085
  • [37] Inverted staggered poly-Si thin-film transistor with planarized SOG gate insulator
    Cheon, Jun Hyuk
    Bae, Jung Ho
    Jang, Jin
    IEEE ELECTRON DEVICE LETTERS, 2008, 29 (03) : 235 - 237
  • [38] A P-channel poly-Si/Si1-xGex/Si sandwiched conductivity modulated thin-film transistor
    Zhu, CX
    Sin, JKO
    IEEE ELECTRON DEVICE LETTERS, 1999, 20 (09) : 470 - 472
  • [39] High temperature crystallized poly-Si on molybdenum substrates for thin-film transistor application
    Park, JH
    Kim, DY
    Ko, JK
    Yi, JS
    POLYCRYSTALLINE SEMICONDUCTORS VII, PROCEEDINGS, 2003, 93 : 13 - 17
  • [40] Conduction processes in a-Si:H and poly-Si films
    Yi, J
    Kim, SS
    Lim, DG
    JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 1997, 30 : S245 - S250
12345