Fabrication and characteristics of a metal/ferroelectric/polycrystalline silicon/insulator/silicon field effect transistor

A n-channel metal/ferroelectric/polycrystalline silicon/insulator/silicon structure field effect transistor (FET) with a Pb(Zr0.52Ti0.48)O-3 ferroelectric layer has been proposed and demonstrated. The Pb(Zr0.52Ti0.48)O-3 ferroelectric layer (200 nm) was deposited by radio frequency magnetron sputtering. The counterclockwise drain current-gate voltage (I-d-V-g) hysteresis loops of the ferroelectric FET demonstrate the memory effect of the device. The counterclockwise hysteresis loops are attributed to the ferroelectric polarization of the Pb(Zr0.52Ti0.48)O-3 film. The memory window measured from the I-d-V-g characteristics is about 2.6 V as the V-g sweeps between -5 and +5 V. The endurance characteristics of the device have been investigated. (c) 2007 American Institute of Physics.