Analysis of InAs-Si Heterojunction Double-Gate Tunnel FETs with Vertical Tunneling Paths

被引：0
|
作者：
Carrillo-Nunez, Hamilton [1 ]
Luisier, Mathieu [1 ]
Schenk, Andreas [1 ]
机构：
[1] ETH, Integrated Syst Lab, Gloriastr 35, CH-8092 Zurich, Switzerland
来源：
ESSDERC 2015 PROCEEDINGS OF THE 45TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2015年
关键词：
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
InAs-Si double-gate TFETs exploiting the two-dimensional (2D) density-of-state (DOS) switch are studied. A full-band and atomistic quantum transport simulator based on the sp(3)d(5)s* tight-binding model is used to solve the quantum transport problem taking into account both lateral and vertical band-to-band tunneling paths. TFETs with only vertical tunneling components are also investigated. Our findings suggest that InAs-Si 2D-2D TFETs might offer a device solution with both steep sub-thermal sub-threshold swing (SS) and high ON-current. In the best case of an extremely thin InAs-Si 2D-2D TFET the minimal swing reaches SS = 12mV/dec and the ON-current 241 A/m.
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页码：302 / 305
页数：4
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