Hardware implementation of an EAN-13 bar code decoder

被引：0

作者：

De Maeyer, J ^{[1
]}

Devos, H ^{[1
]}

Meeus, W ^{[1
]}

Verplaetse, P ^{[1
]}

Stroobandt, D ^{[1
]}

机构：

[1] State Univ Ghent, B-9000 Ghent, Belgium

来源：

ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE | 2003年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents an FPGA hardware implementation of a bar code decoder using the EAN-13 standard. The design was implemented on a FPGA situated on an ATMEL FPLSIC (Field Programmable System Level Integrated Circuit, AT94K40-25DQC). The design has comparable performance and is in many ways more robust than commercially available devices. However, to the authors' knowledge, these all use a microprocessor while our design is purely dedicated hardware.

引用

页码：583 / 584

页数：2

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