Ultra-Uniform Copper Deposition in High Aspect Ratio Plated through Holes via Pulse-Reverse Plating

被引:9
|
作者
Ge, Wen [1 ]
Li, Wensheng [1 ]
Li, Rihong [2 ]
Dong, Yifan [1 ]
Zeng, Ziming [1 ]
Cao, Hui [1 ]
Yu, Longlin [1 ]
Wen, Zhijie [1 ]
He, Jin [3 ,4 ]
机构
[1] China Univ Geosci, Fac Mat Sci & Chem, Wuhan 430078, Peoples R China
[2] Jomoo Kitchen & Bath Co Ltd, Quanzhou 362304, Peoples R China
[3] Univ Chinese Acad Sci, Hangzhou Inst Adv Study, Hangzhou 310024, Peoples R China
[4] Chinese Acad Sci, Shanghai Inst Opt & Fine Mech, Key Lab Mat High Power Lasers, Shanghai 201800, Peoples R China
关键词
pulse-reverse plating; ultra-uniform copper; plated through holes; high aspect ratio; reverse pulse frequency; DIFFUSION LAYER MODEL; DENSITY; ELECTRODEPOSITION; RELIABILITY; ADDITIVES; FREQUENCY;
D O I
10.3390/coatings12070995
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The uniformity and microstructure of the copper deposition in the high aspect ratio plated through holes (penetrating holes) are crucial for the performance of printed circuit board. We systematically investigated the effects of reverse pulse parameters in the period pulse reverse (PPR) plating on the uniformity and microstructure of the copper deposition, including reverse pulse frequency, reverse pulse duty cycle and reverse pulse current density. The Cu deposition behavior (throwing power) and its crystallographic characteristics, including grain size, crystallographic orientation, and grain boundary, were characterized by means of field-emission scanning electron microscopy (FE-SEM), X-ray diffractometer (XRD), and electron backscatter diffraction (EBSD). Our results clarify that the reverse pulse current density and duty ratio should be low to achieve the full filling and high uniformity of the through holes. The reverse pulse frequency of 1500 Hz would prevent the through holes to be fully filled. The copper electrodeposition in PTH prepared by double pulse electrodeposition has the good (111) surface texture and grain boundary distribution. This work demonstrated that the period pulse reverse (PPR) plating provides unique advantages in achieving the ultra-uniform copper deposition in the high aspect ratio plated through holes.
引用
收藏
页数:15
相关论文
共 40 条
  • [31] Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias
    Djomeni, Larissa
    Mourier, Thierry
    Minoret, Stephane
    Fadloun, Sabrina
    Piallat, Fabien
    Burgess, Steve
    Price, Andrew
    Zhou, Yun
    Jones, Christopher
    Mathiot, Daniel
    Maitrejean, Sylvain
    MICROELECTRONIC ENGINEERING, 2014, 120 : 127 - 132
  • [32] Electroless Ru/Cu Deposition Without Pd Activation for the Formation of Continuous Cu Seed Layers in High-Aspect-Ratio Via-Holes
    Seo, Sungho
    Yoo, Bongyoung
    JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, 2016, 16 (11) : 11267 - 11271
  • [33] Effect of improved wettability of silicon-based materials with electrolyte for void free copper deposition in high aspect ratio through-vias
    Dixit, Pradeep
    Chen, Xiaofeng
    Miao, Jianmin
    Preisser, Robeit
    THIN SOLID FILMS, 2008, 516 (16) : 5194 - 5200
  • [34] Study of surface treatment processes for improvement in the wettability of silicon-based materials used in high aspect ratio through-via copper electroplating
    Dixit, Pradeep
    Chen, Xiaofeng
    Miao, Jianmin
    Divakaran, Sheeja
    Preisser, Robert
    APPLIED SURFACE SCIENCE, 2007, 253 (21) : 8637 - 8646
  • [35] Via-First Process to Enable Copper Metallization of Glass Interposers With High-Aspect-Ratio, Fine-Pitch Through-Package-Vias
    Huang, Timothy B.
    Chou, Bruce
    Tong, Jialing
    Ogawa, Tomonori
    Sundaram, Venky
    Tummala, Rao R.
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2017, 7 (04): : 544 - 551
  • [36] Enhanced Barrier Seed Metallization for Integration of High-Density High Aspect-Ratio Copper-Filled 3D Through-Silicon Via Interconnects
    Civale, Yann
    Armini, Silvia
    Philipsen, Harold
    Redolfi, Augusto
    Velenis, Dimitrios
    Croes, Kristof
    Heylen, Nancy
    El-Mekki, Zaid
    Vandersmissen, Kevin
    Beyer, Gerald
    Swinnen, Bart
    Beyne, Eric
    2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 822 - 826
  • [37] Towards void-free copper filling of low-aspect-ratio heat dissipation through holes in packaging substrate with high H2SO4 concentration electroplating system
    Wang, Zhe
    Su, Pengfei
    Peng, Yang
    Chen, Mingxiang
    Wang, Qing
    JOURNAL OF INDUSTRIAL AND ENGINEERING CHEMISTRY, 2025, 142 : 272 - 281
  • [38] Highly-Conformal Plasma-Enhanced Atomic-Layer Deposition Silicon Dioxide Liner for High Aspect-Ratio Through-Silicon Via 3D Interconnections
    Civale, Yann
    Redolfi, Augusto
    Velenis, Dimitrios
    Heylen, Nancy
    Beynet, Julien
    Jung, InSoo
    Woo, Jeong-Jun
    Swinnen, Bart
    Beyer, Gerald
    Beyne, Eric
    2012 4TH ELECTRONIC SYSTEM-INTEGRATION TECHNOLOGY CONFERENCE (ESTC), 2012,
  • [39] Autocatalytic Deposition of Nickel-Boron Diffusion Barrier onto Diazonium-Treated SiO2 for High Aspect Ratio Through-Silicon Via Technology in 3D Integration
    Zeb, Gul
    Nguyen, Tien Dat
    Giang, Thi Phuong Ly
    Le, Xuan Tuan
    ACS APPLIED ELECTRONIC MATERIALS, 2024, 6 (03) : 2011 - 2018
  • [40] A low-cost spin-on-glass (SOG) liner deposited by vacuum-assisted spin coating technique for via-last ultra-high aspect ratio through-silicon vias
    Chen, Xuyan
    Ding, Yingtao
    Zhang, Ziyue
    Xiao, Lei
    Wang, Han
    Chen, Zhiming
    2023 24TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2023,