Design space exploration of media processors: Ageneric VLIW architecture and a parameterized scheduler

被引：0

作者：

Paya-Vaya, Guillermo ^{[1
]}

Martin-Langerwerf, Javier ^{[1
]}

Taptimthong, Piriya ^{[1
]}

Pirsch, Peter ^{[1
]}

机构：

[1] Leibniz Univ Hannover, Inst Microelect Syst, Appel Str 4, D-30167 Hannover, Germany

来源：

ARCHITECTURE OF COMPUTING SYSTEMS - ARCS 2007, PROCEEDINGS | 2007年 / 4415卷

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a new environment for exploring and optimizing VLIW architectures for multimedia applications. The environment consists of a generic VLIW architecture, in which virtually all characteristics can be changed, and an assembler with the corresponding parameterized scheduler based on an enhanced version of the list scheduling algorithm. A novel partitioned register file architecture is proposed and analyzed with this environment. This is performed using a highly time consuming task of the H.264 video decoder application. Performance improvements of up to 67% can be achieved when running this application on different architecture configurations.

引用

页码：254 / +

页数：3

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