All-digital PLL with extended tracking capabilities

被引：1
|
作者：
Lorenzo-Ginori, JV [1 ]
Naranjo-Bouzas, JA [1 ]
机构：
[1] Univ Cent Las Villas, Fac Elect Engn, Santa Clara 54830, Villa Clara, Cuba
来源：
ELECTRONICS LETTERS | 1997年 / 33卷 / 18期
关键词：
phase-locked loops; digital circuits;
D O I：
10.1049/el:19971073
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An algorithm for implementing a class of all-digital phase-locked loops (DPLLs) is reported. As required in many signal-tracking applications, the algorithm can be used to obtain a wider lock-in range while maintaining a narrow bandwidth. Details of the algorithm implementation and some DPLL properties obtained by computer simulation are given.
引用
收藏
页码：1519 / 1521
页数：3
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