Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs

被引:10
|
作者
Hsieh, Dong-Ru [1 ]
Lin, Jer-Yi [1 ]
Kuo, Po-Yi [2 ,3 ]
Chao, Tien-Sheng [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu 30010, Taiwan
[2] Natl Chiao Tung Univ, Dept Photon, Hsinchu 30010, Taiwan
[3] Natl Chiao Tung Univ, Inst Electroopt Engn, Hsinchu 30010, Taiwan
关键词
Carrier mobility; channel dimension; crystallinity; effective carrier concentration; junctionless (JL); multifunctional 3-D ICs; Pi-gate (PG); poly-Si; DEVICE DESIGN; TRANSISTORS; PERFORMANCE; MOSFETS; MOBILITY;
D O I
10.1109/TED.2017.2704933
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the electrical characteristics of the Pi-gate junctionless FETs (PG JL FETs) with the in situ n(+) doped poly-Si (DP-Si) fin-channels have been experimentally investigated and comprehensively discussed. The subthreshold behavior and threshold voltage of the PG JL FETs are sensitive to the channel dimensions, especially the channel width. The crystallinity, carrier mobility, and effective carrier concentration in the DP-Si films are dependent on the initial DP-Si film thicknesses, which directly influence the on current and threshold voltage of the PG JL FETs. Based on an evaluation on the subthreshold behavior and the driving current, we found that the PG JL FETs with the low/high aspect ratio (A.R. = channel thickness/channel width) are separately suitable for the low-power/high-performance applications. Among these PG JL FETs, the device with a proper A.R. (3.35) exhibits a relatively steep subthreshold swing (S.S.) of 66 mV/decade and the highest (ON)/(OFF) currents ratio (I-ON/I-OFF) of 1.2 x 10(8) (VD = 1 V). These devices are very promising candidates for future multifunctional 3-D integrated circuit applications.
引用
收藏
页码:2992 / 2998
页数:7
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