Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing

被引：1

作者：

Tadic, Marija ^{[1
]}

Kovacevic, Jelena ^{[1
]}

机构：

[1] Univ Novi Sad, Fac Tech Sci, Novi Sad 21000, Serbia

来源：

2009 1ST IEEE EASTERN EUROPEAN CONFERENCE ON THE ENGINEERING OF COMPUTER BASED SYSTEMS | 2009年

关键词：

D O I：

10.1109/ECBS-EERC.2009.24

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we describe the technique for optimization of demanding DSP applications on a dual core DSP-s. In addition to common techniques of optimization, we use the Advanced Multi-core Optimization Technique, resolving load balancing problem. The methodology of the proposed technique is based on the application partitioning on two cores, assuming algorithm and processor architecture understanding. To verify the described technique we used one class of lossless audio decoder on CS4953xx dual core processor.

引用

页码：154 / 155

页数：2

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