A Parallel Image Processing Platform based on Multi-Core DSP

被引：0
|
作者：
Wang, Guodong [1 ,2 ]
Liu, Xiaojian [2 ]
机构：
[1] Northwestern Polytech Univ, Sch Comp Sci & Engn, Xian, Shaanxi, Peoples R China
[2] AVIC Comp Tech Res Inst, Xian, Shaanxi, Peoples R China
来源：
2017 16TH IEEE/ACIS INTERNATIONAL CONFERENCE ON COMPUTER AND INFORMATION SCIENCE (ICIS 2017) | 2017年
关键词：
real-time processing; hardware parallel; high-speed serial; multi-core scheduling;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In order to achieve real-time processing of the image with high frame rate and high resolution, the image processing system has been required to have higher data transmission bandwidth and data processing capacity. Multi-core DSP is used as the key processor to solve the problem of data transmission and processing bottleneck, which the current image processing platforms are facing. The characteristics of FPGA's hardware parallel processing are made use of to realize the preprocessing of multi-channel video. The communication interface of high-speed serial RapidIo is designed to complete real-time transmission of the video. Analyze the multi-core scheduling characteristics to ensure the real-time processing and test the system's performance based on related algorithm.
引用
收藏
页码：185 / 189
页数：5
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