Testing Parametric and Catastrophic Faults in Mixed-Signal Integrated Circuits using Wavelets

被引：1

作者：

Spyronasios, A. D. ^{[1
]}

Dimopoulos, M. G. ^{[2
]}

Papadopoulos, N. P. ^{[1
]}

Hatzopoulos, A. A. ^{[1
]}

机构：

[1] Aristotle Univ Thessaloniki, Dept Elect & Comp Engn, Thessaloniki, Greece

[2] Alexander Technol Educ Inst Thessaloniki, Dept Elect, Thessaloniki, Greece

来源：

IEEE ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2010) | 2010年

关键词：

Circuit Testing; Mixed-Signal Integrated Circuit Testing; Wavelets; Mahalanobis Distance; SUPPLY CURRENT TEST; ANALOG;

D O I：

10.1109/ISVLSI.2010.36

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper a test method for testing both parametric and catastrophic faults in analog and mixed signal Integrated Circuits (ICs) is presented. It is based on the wavelet transformation of the measured signal, be it supply current (IPS) or output voltage (VOUT) waveform. The tolerance limit for the good or reference IC is set by statistical processing data obtained from a set of fault-free ICs. In the wavelet analysis, two test metrics one named discrimination factor and one utilizing Mahalanobis distances are introduced. Both metrics rely on wavelet energy computation. Results from the application of the proposed method in testing known analog and mixed signal IC benchmarks are presented showing the effectiveness of the proposed testing scheme.

引用

页码：232 / 237

页数：6

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