Predictive High Frequency Effects of Substrate Coupling in 3D Integrated Circuits Stacking.

被引：0

作者：

Eid, E. ^{[1
]}

Lacrevaz, T. ^{[1
]}

de Rivaz, S. ^{[1
]}

Bermond, C. ^{[1
]}

Flechet, B. ^{[1
]}

Calmon, F. ^{[2
]}

Gontrand, C. ^{[2
]}

Farcy, A. ^{[3
]}

Cadix, L. ^{[1
,3
]}

Ancey, P. ^{[3
]}

机构：

[1] Univ Savoie, IMEP LAHC, UMR CNRS 5130, F-73376 Le Bourget Du Lac, France

[2] Inst Nanotechnol Lyon, UMR CNRS 5270, INSA, F-69621 Villeurbanne, France

[3] STMicroelect, F-38926 Crolles, France

来源：

2009 IEEE INTERNATIONAL CONFERENCE ON 3D SYSTEMS INTEGRATION | 2009年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In 3D integrated circuits, substrate coupling effects due to propagation of High Frequency (HF) parasitic signals are carried by Through Silicon Vias (TSV). These electrical coupling leads to several impacts on performance of 3D circuits. In this paper, predictive HF electrical simulations are achieved by full wave analysis in order to make obvious the coupling effect due to TSN's presence. Solutions to reduce substrate coupling are proposed and discussed.

引用

页码：288 / +

页数：2

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