Design and implementation of electrical-supply-free VLSI circuits

被引:0
|
作者
Wang, CY [1 ]
Devos, F [1 ]
机构
[1] Concordia Univ, Dept Elect & Comp Engn, Montreal, PQ H3G 1M8, Canada
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we propose an approach of the design and implementation of VLSI circuits free of electrical supply and power rails. With this approach, the circuits can be made to use the power carried by the incident light for supply, control, and optical charge pumping. The circuits can be fabricated in a standard CMOS technology without additional process. A test circuit involving basic gates and a pulse generator has been designed and fabricated in a 0.18 mum process, and successfully tested.
引用
收藏
页码:43 / 48
页数:6
相关论文
共 50 条
  • [31] Redesign strategies for digital VLSI circuits with incomplete implementation information
    Khalil, MA
    Wey, CL
    1998 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, 1999, : 264 - 267
  • [32] Design and Implementation of Active Decoupling Capacitor Circuits for Power Supply Regulation in Digital ICs
    Gu, Jie
    Harjani, Ramesh
    Kim, Chris H.
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2009, 17 (02) : 292 - 301
  • [33] COMPUTER DESIGN AIDS FOR VLSI CIRCUITS - ANTOGNETTI,P
    AGNEW, D
    IEEE SPECTRUM, 1983, 20 (09) : 9 - 10
  • [34] Robust Design of Power-Efficient VLSI Circuits
    Pedram, Massoud
    ISPD 11: PROCEEDINGS OF THE 2011 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, 2011, : 1 - 1
  • [35] Analog Design Issues in Digital VLSI Circuits and Systems
    Juan J. Becerra
    Eby G. Friedman
    Analog Integrated Circuits and Signal Processing, 1997, 14 : 5 - 8
  • [36] DESIGN OF TESTABLE VLSI CIRCUITS WITH MINIMUM AREA OVERHEAD
    CHALASANI, PR
    BHAWMIK, S
    ACHARYA, A
    PALCHAUDHURI, P
    IEEE TRANSACTIONS ON COMPUTERS, 1989, 38 (10) : 1460 - 1462
  • [37] Design of Fault Injection Technique for VLSI Digital Circuits
    Lavanyashree, B. J.
    Jamuna, S.
    2017 2ND IEEE INTERNATIONAL CONFERENCE ON RECENT TRENDS IN ELECTRONICS, INFORMATION & COMMUNICATION TECHNOLOGY (RTEICT), 2017, : 1601 - 1605
  • [38] Automated Design Error Debugging of Digital VLSI Circuits
    Mohammed Moness
    Lamya Gaber
    Aziza I. Hussein
    Hanafy M. Ali
    Journal of Electronic Testing, 2022, 38 : 395 - 417
  • [39] DESIGN OF RELIABLE VLSI CIRCUITS USING SIMULATION TECHNIQUES
    HSU, WJ
    SHEU, BJ
    GOWDA, SM
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (03) : 452 - 457
  • [40] Design error diagnosis and correction in VLSI digital circuits
    Veneris, AG
    Hajj, IN
    40TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 1998, : 1005 - 1008