Asymmetrical Write-Assist for Single-Ended SRAM Operation

被引：0

作者：

Lin, Jihi-Yu ^{[1
]}

Tu, Ming-Hsien ^{[1
]}

Tsai, Ming-Chien ^{[1
]}

Jou, Shyh-Jye ^{[1
]}

Chuang, Ching-Te ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan

来源：

IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, asymmetrical Write-assist cell virtual ground biasing and positive feedback sensing keeper schemes are proposed to improve the Read Static Noise Margin (RSNM), Write Margin (WM), and operation speed of a single-ended Read/Write 8T SRAM cell. A 4Kbit SRAM implemented in 90nm CMOS technology achieves 1uW/bit average power consumption at 6MHz, V-min of 410mV at 6MHz, and 234MHz maximum operation frequency at 600mV.

引用

页码：101 / 104

页数：4

共 50 条

[41] An SRAM design in 65-nm technology node featuring read and write-assist circuits to expand operating voltage
Pilo, Harold
Barwin, Charlie
Braceras, Geordie
Browning, Chris
Lamphier, Steve
Towler, Fred
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (04) : 813 - 819
[42] A 45-nm Dual-Port SRAM Utilizing Write-Assist Cells Against Simultaneous Access Disturbances
Wu, Jui-Jen
Chang, Meng-Fan
Lu, Shau-Wei
Lo, Robert
Li, Quincy
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2012, 59 (11) : 790 - 794
[43] SINGLE-ENDED CONDUCTANCE
SHAW, G
[J]. ELECTRONICS & WIRELESS WORLD, 1987, 93 (1612): : 219 - 224
[44] Thermal Stability Analysis of Single-Ended 9T-ST Robust SRAM Cell for Near-Threshold Operation
Ganesh, Chokkakula
Murthy, K. S. N.
[J]. INTERNATIONAL JOURNAL OF NANOSCIENCE, 2021, 20 (06)
[45] On the Efficacy of Write-Assist Techniques in Low Voltage Nanoscale SRAMs
Chandra, Vikas
Pietrzyk, Cezary
Aitken, Robert
[J]. 2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010), 2010, : 345 - 350
[46] Dual-Threshold Single-Ended Schmitt-Trigger Based SRAM Cell
Sreenivasan, Divya
Purushothaman, Devika
Pande, Kirti S.
Murty, N. S.
[J]. 2016 IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND COMPUTING RESEARCH, 2016, : 677 - 680
[47] A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM
Shi, Dashan
You, Heng
Yuan, Jia
Wang, Yulian
Qiao, Shushan
[J]. IEICE TRANSACTIONS ON ELECTRONICS, 2022, E105C (11) : 712 - 719
[48] High speed single-ended pseudo differential current sense amplifier for SRAM cell
Sil, Abhijit
Kolli, Eswar Prasad
Ghosh, Soumik
Bayoumi, Magdy
[J]. PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, : 3330 - 3333
[49] A lightweight write-assist scheme for reduced RRAM variability and power
Aziza, H.
Hajri, B.
Mansour, M.
Chehab, A.
Perez, A.
[J]. MICROELECTRONICS RELIABILITY, 2018, 88-90 : 6 - 10
[50] A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell
Kushwah, C. B.
Vishvakarma, S. K.
[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (01) : 373 - 377

← 1 2 3 4 5 →