Fault-tolerant Design for Flying Capacitor Multilevel Inverters

被引:0
|
作者
Chen, Alian [1 ]
Zhang, Chenghui [1 ]
He, Xiangning [2 ]
Cui, Naxin [1 ]
机构
[1] Shandong Univ, Sch Control Sci & Engn, Jinan 250061, Peoples R China
[2] Zhejiang Univ, Coll Elect Engn, Hangzhou 310027, Peoples R China
关键词
TOPOLOGY;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The fault-tolerant design for any-level flying capacitor multilevel inverters is discussed in this paper, which is based on the novel combination scheme for flying capacitor multilevel inverters. When a power switch fault is detected in a single-phase, the same number of voltage levels can be maintained by reconfiguring the n-cell topology to a (n-1) cell topology. If two power switches in one same cell fail at the same time, the two fault switches can be bypassed simultaneously and the corresponding branch be separated from the main circuitry, the fault-tolerance can also be realized by using the same reconfiguration method. The validity has been proven through simulation results in a five level single-phase inverter.
引用
收藏
页码:55 / +
页数:2
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