Variable stress-induced leakage, current and analysis of anomalouscharge loss for flash memory application

in advanced flash-EEPROM devices, the retention time is limited by "moving bit" (MB) [1], "fast bit" [2] or "anomalous cells" [3] which exhibit anomalously large threshold-voltage shift (DeltaV(T)). MB investigations have been carried out extensively using flash memory cells or arrays [1-3]. One of the intriguing characteristics of the MB problem is that the worst bit in the A VT distribution changes [1,4,5]. An understanding of this erratic nature is needed in order to develop an accurate retention-time prediction method for future flash memory devices. Since the MB is caused by anomalous charge loss through the tunnel oxide, the characterization of stress-induced leakage current (SILC) in suitable metal-oxide-semiconductor (MOS) capacitor test structures should be useful for determining the responsible mechanism. SILC is too small to measure in a commercial flash memory cell [6], so large-area capacitors have generally been used to characterize the leakage current. However, since the MB corresponds to the tail portion of the retention-time distribution, the erratic behavior has not been observed in large capacitors. We have therefore used small-area capacitors with thinner oxide for SILC analysis in to his study.