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- [21] Advances in Wire Bonding Technology for 3D Die Stacking and Fan Out Wafer Level Package 2017 IEEE 67TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2017), 2017, : 1309 - 1315
- [22] Device Dielectric Quality analysis and Fault Isolation at the contact level by scanning Microwave Impedance Microscopy ISTFA 2016: CONFERENCE PROCEEDINGS FROM THE 42ND INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS, 2016, : 463 - 467
- [23] Board level thermal cycle reliability and solder joint fatigue life predictions of multiple stacked die chip scale package configurations 54TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2004, : 699 - 703
- [24] Fault Isolation Of Die Level Crystal Defect Failure Mechanism Through OBIRCH Analysis And Micro-probing Proceedings of the 2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2016, : 197 - 200
- [25] Device-level fault isolation of advanced flip-chip devices using scanning SQUID microscopy IPFA 2008: PROCEEDINGS OF THE 15TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS, 2008, : 104 - 107