A Low-Power 10-Bit 40-MS/s Pipeline ADC Using Extended Capacitor Sharing

被引：0

作者：

Esmaeelzadeh, Hani ^{[1
]}

Sharifkhani, Mohammad ^{[1
]}

Shabany, Mahdi ^{[1
]}

机构：

[1] Sharif Univ Technol, Sch Elect Engn, Tehran, Iran

来源：

2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2014年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a new capacitor sharing technique for pipeline ADCs. It enables power reduction of the first and second MDACs simultaneously. The presented noise and power analysis shows that the proposed method is about 3 0 % more efficient than the conventional one in terms of the first and second MDACs power dissipation. A 10-bit 40MS/s pipeline ADC employing the proposed technique was designed in 90-nm CMOS technology achieving a power consumption of 4.2 mW.

引用

页码：1147 / 1150

页数：4

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