A reconfigurable chip for evolvable hardware

被引:0
|
作者
Thoma, Y [1 ]
Sanchez, E [1 ]
机构
[1] Swiss Fed Inst Technol EPFL, Lausanne, Switzerland
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In the recent years, Xilinx devices, like the XC6200, were the preferred solutions for evolving digital systems. In this paper, we present a new System-On-Chip, the POEtic chip, an alternative for evolvable hardware. This chip has been specifically designed to ease the implementation of bio-inspired systems. It is composed of a microprocessor, and a programmable part, containing basic elements, like every standard Field Programmable Gate Array, on top of which sits a special layer implementing a dynamic routing algorithm. Online on-chip evolution can then be processed, as every configuration bit of the programmable array can be accessed by the microprocessor. This new platform can therefore replace the Xilinx XC6200, with the advantage of having a processor inside.
引用
收藏
页码:816 / 827
页数:12
相关论文
共 50 条
  • [1] An evolvable hardware chip for a prosthetic-hand controller - New reconfigurable hardware paradigm
    Kajitani, I
    Iwata, M
    Otsu, N
    Higuchi, T
    [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2003, E86D (05): : 882 - 890
  • [2] Reconfigurable Circuit Design using Evolvable Hardware Chip for Illumination Tolerant Image Enhancement
    Reddy, A. Guruva
    Prasad, M. N. Giri
    Krishna, K. Sri Rama
    [J]. 2008 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLS 1-6, 2008, : 262 - +
  • [3] An evolvable hardware chip for prosthetic hand controller
    Kajitani, I
    Murakawa, M
    Nishikawa, D
    Yokoi, H
    Kajihara, N
    Iwata, M
    Keymeulen, D
    Sakanashi, H
    Higuchi, T
    [J]. PROCEEDINGS OF THE SEVENTH INTERNATIONAL CONFERENCE ON MICROELECTRONICS FOR NEURAL, FUZZY AND BIO-INSPIRED SYSTEMS, MICORNEURO'99, 1999, : 179 - 186
  • [4] Evolvable hardware: From on-chip circuit synthesis to evolvable space systems
    Stoica, A
    [J]. 30TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS, 2000, : 161 - 169
  • [5] On the construction of neuromolecular chip: A biologically motivated evolvable hardware
    Lin, Yo-Hsien
    Chen, Jong-Chen
    [J]. WSEAS Transactions on Circuits and Systems, 2007, 6 (01): : 80 - 86
  • [6] On the design of a malleable chip: A biologically motivated evolvable hardware
    Chen, JC
    Lin, YH
    [J]. PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON NEURAL NETWORKS AND BRAIN, VOLS 1-3, 2005, : 799 - 804
  • [7] A Hierarchical Parallel Evolvable Hardware Based on Network on Chip
    Wang, JunRong
    Wang, Dan
    Lai, JinMei
    [J]. 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2013,
  • [8] An evolvable hardware chip for image enhancement in surface roughness estimation
    Narayanan, MR
    Gowri, S
    Ravi, S
    [J]. ADVANCES IN NATURAL COMPUTATION, PT 3, PROCEEDINGS, 2005, 3612 : 361 - 365
  • [9] Evolvable hardware chip for high precision printer image compression
    Sakanashi, H
    Salami, M
    Iwata, M
    Nakaya, S
    Yamauchi, T
    Inuo, T
    Kajihara, N
    Higuchi, T
    [J]. FIFTEENTH NATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE (AAAI-98) AND TENTH CONFERENCE ON INNOVATIVE APPLICATIONS OF ARTIFICAL INTELLIGENCE (IAAI-98) - PROCEEDINGS, 1998, : 486 - 491